Measuring Intermetallic Phase Growth in Lead Free Solder Joints
Accurate intermetallic phase growth measurement requires bevel-free metallographic polishing, etching chemical selection, and kinetic modeling to set supplier liability limits.
ENIG Gold Embrittlement
Meaning
Interfacial failure mechanisms resulting from the interaction between excessive gold content and tin based solder alloys cause the formation of brittle intermetallic phases in electronic joints. This ENIG gold embrittlement occurs when the thin gold layer on an electroless nickel immersion gold surface finish dissolves into the solder during the reflow process and then precipitates as a brittle compound. If the concentration of gold in the solder joint exceeds a certain threshold, typically around three weight percent, the ductility of the joint is significantly compromised.
This leads to a higher risk of fracture when the printed circuit board is subjected to mechanical stress, such as bending or vibration. The resulting intermetallic phase, usually (Au,Ni)Sn4, tends to form at the interface where it acts as a site for crack initiation. This phenomenon is a well known reliability concern in the electronics industry, particularly for assemblies with small solder volumes where the relative gold concentration is higher.
Brittle Fracture
Mechanical weakness in the solder joint is the most direct consequence of having too much gold in the tin-rich matrix. When the ENIG gold embrittlement takes hold, the joint no longer deforms plastically to absorb energy during an impact. Instead, it fails catastrophically along the intermetallic layer, a mode known as brittle fracture.
This is especially problematic for ball grid array packages where the solder spheres are the only structural connection between the component and the board. Failure often occurs at the interface between the nickel layer and the solder, where the brittle gold-tin compounds are concentrated. In many cases, the electrical connection may appear normal during initial testing but fail prematurely in the field.
Testing for this condition usually involves high speed shear or pull tests to see if the joint breaks in a brittle or ductile manner.
Plating Chemistry
Control of the gold layer thickness is the primary method used by printed circuit board manufacturers to prevent this failure mode. The immersion gold process is designed to deposit a very thin layer, usually between 0.05 and 0.1 micrometers, which is just enough to protect the underlying nickel from oxidation. If the gold layer is too thick, perhaps due to poor process control or long immersion times, the amount of gold entering the solder joint will increase.
Modern plating lines use automated controllers to monitor the chemistry of the immersion bath and ensure consistent thickness across all boards. The nickel layer itself must also be of high quality, as a porous or “black” nickel layer can exacerbate the migration of gold and further weaken the joint. Manufacturers often perform regular cross sectional analysis and x-ray fluorescence measurements to verify the plating specifications are being met.
Assembly Risk
Smaller components and higher density designs increase the likelihood of this problem because the ratio of gold surface area to solder volume is higher. As the electronics industry moves toward miniaturization, the same gold thickness that was safe for large components can become dangerous for tiny chip scale packages. Designers must account for the total gold content in the joint when selecting the surface finish for high reliability products.
In some cases, an alternative finish like electroless nickel electroless palladium immersion gold is used because the palladium layer acts as a barrier and reduces the need for a thick gold layer. This helps to mitigate the ENIG gold embrittlement while maintaining excellent solderability and wire bonding capability. Regular auditing of the PCB supplier’s plating process is a standard practice for companies producing critical hardware.
This ensures that the surface finish remains within the safe window for the specific solder alloy and reflow process being used.