Meaning
Solid-state migration of metal atoms driven by mechanical stress gradients arising from mismatched thermal expansion coefficients occurs during high-temperature manufacturing or operating cycles. Within the narrow copper interconnects of microchips, thermal stress migration leads to the movement of vacancies and metal atoms, resulting in void formation and circuit failure. The process is governed by the difference in expansion rates between the metal lines and the surrounding silicon or dielectric material.
Below the annealing temperature of the metal, or under low thermal operating gradients, the rate of atomic transport decreases.
Deformation Driver
Tensile stress develops in the copper lines when the semiconductor package cools down from deposition temperatures. This stress is non-uniform, peaking near the grain boundaries and the interfaces with dielectric layers. Metal atoms migrate away from these high-stress regions to relieve the mechanical strain, leaving behind vacancies that coalesce into voids.
The rate of this migration depends on the operating temperature.
Reliability Consequence
The growth of these stress-induced voids can eventually lead to complete open circuits or resistance increases. Such defects typically occur under the vias where stress concentrations are highest. Electrical testing of the device after thermal baking cycles reveals the extent of the damage.
This failure mode poses a major challenge to the long-term reliability of advanced packaging.
Design Solution
Altering the geometry of the metal lines by adding redundancy or reducing the width of the lines lowers the local stress concentration. Utilizing low-stress dielectric materials and optimizing the metal annealing profiles also minimizes the strain gradients. This prevents the formation of voids.