Meaning
Probability of a functional semiconductor assembly resulting from the vertical or planar stacking of multiple dies and interposers. Manufacturers monitor 2.5d 3d packaging yield as a primary metric for process maturity. Yield metrics capture the compounding losses from individual die testing and the bonding processes.
Statutory Classification
Categorization of assembly processes falls under the high-end manufacturing catalogue managed by the Ministry of Industry and Information Technology. Because 2.5d 3d packaging yield dictates the economic viability of domestic chip production, it is often used as a metric for receiving state-backed research grants. Filing requirements for specialized equipment imports often depend on the specific yield targets declared in the project feasibility study.
Process Dependency
Technical success depends on the known good die strategy where each component is tested before integration. When a single layer in a vertical stack fails, the entire unit is typically discarded (a reality that drives costs higher for three dimensional structures than for single chips). The use of through silicon vias and micro bumps introduces additional points of failure.
In the Chinese administrative context, a factory must demonstrate a stable yield over a trial period to qualify for the full VAT refund on high-tech exports. Verification involves an onsite audit by the State Administration for Market Regulation to ensure that reported production volumes match physical output and scrap rates.
Quality Boundary
The physical boundary separates the responsibilities of the foundry and the assembly house under standard Chinese commercial contracts.